Reference page — cumulative record through Monday, October 19, 2026 UTC. Reference pages update as the archive grows; only dated daily editions are immutable pages of record.
CVE-2020-24512
n/a Intel(R) Processors — Observable timing discrepancy in some Intel(R) Processors may allow an authenticated user to potentially enable information disclosure vi…
AV AC PR UI S C I A CVSS EPSS %ile KEV
L L L N U L N N 3.3 .0038 30.8 —
AFFECTED
Product Versions Fixed
Intel(R) Processors See references – —
TIMELINE
Aug 19 Reserved by intel
Jun 9 Published (CNA: intel)
Oct 8 ENRICHED — CVE-2020-24512 (Intel(R) Processors). Received CVSS 3.3 and CPE data from NVD.
Description
Observable timing discrepancy in some Intel(R) Processors may allow an authenticated user to potentially enable information disclosure via local access.
Lifecycle
Complete event history — 3 events, chronological
| Date | Event | Detail |
| August 19, 2020 | Reserved | Reserved by intel |
| June 9, 2021 | Published | Published (CNA: intel) |
| October 8, 2026 | ENRICHED | ENRICHED — CVE-2020-24512 (Intel(R) Processors). Received CVSS 3.3 and CPE data from NVD. |
Affected
Affected products and packages — 1 row
| Vendor | Product / Package | Ecosystem | Version introduced | Fixed |
| n/a | Intel(R) Processors | — | See references | — |
About this page
This is a reference page, not a dated page of record. It assembles the complete lifecycle of CVE-2020-24512 from the CVE Program record, NVD enrichment, the CISA KEV catalog, EPSS, and OSV advisories. The box score's numbers (CVSS, EPSS, KEV status) are current as of Monday, October 19, 2026 UTC and are re-derived as the archive grows; only dated daily editions are immutable pages of record. The authoritative source for this identifier is cve.org.